	.text
	.global	_start
_start:
	B	HANDLE_ResetInit

HANDLE_ResetInit:
	mrc 	p15,0,r0,c1,c0,0
	ldr		r1,=0xffffeffe
	and		r0,r0,r1
	mcr 	p15,0,r0,c1,c0,0

	
	mov r0, #0 
	mcr p15, 0, r0, c7, c7 
	mcr p15, 0, r0, c7, c10, 4
	mcr p15, 0, r0, c8, c7 

	
	
	mov r1, #0xd3			;//svc mode
	msr		cpsr_cxsf,r1
	ldr		sp,=0x33fe4000
	
	//;set to high vector address
	//;read c1 to r5
	MRC p15,0,r5,c1,c0,0
	
	//;set bit 13 of c1
	orr	r5, r5, #0x2000
	
	//;write r5 to c1
	mcr	p15, 0, r5, c1, c0, 0

	
	bl make_mmu_table

	//;mmu page table
	ldr r1,=0x30100000
	mcr	p15, 0, r1, c2, c0, 0

	//;//MMU_SetDomain
  	//;ldr		r0,=0x55555550|(0<<2)|(1<<0)
   	ldr		r0,=0x55555555
   	mcr 	p15,0,r0,c3,c0,0
		
 	//;//MMU_SetProcessId
   	ldr 	r0,=0
   	mcr 	p15,0,r0,c13,c0,0
   	   
	//;//MMU_Enable
  	ldr 	r1, =0xC000300D
   	mrc 	p15,0,r0,c1,c0,0
   	orr 	r0,r0,r1
   	mcr 	p15,0,r0,c1,c0,0
	nop 
	nop   	
	ldr		pc,=virtual_start
	nop 
	nop
virtual_start:
	nop
	nop
	nop
	nop


	mov r1, #0x11			;//FIQ mode
	msr		cpsr_cxsf,r1
	ldr		sp,=0x30200000
	
	mov r1, #0x12			;//IRQ mode
	msr		cpsr_cxsf,r1
	ldr		sp,=0x301fc000

	mov r1, #0x1f			;//sys mode
	msr		cpsr_cxsf,r1
	ldr		sp,=0x301f8000	
		
	mov r1, #0x17			;//abt mode
	msr		cpsr_cxsf,r1
	ldr		sp,=0x301f4000

	mov r1, #0x1b			;//undef mode
	msr		cpsr_cxsf,r1
	ldr		sp,=0x301f0000
	
	mov r1, #0xd3			;//svc mode
	msr		cpsr_cxsf,r1
	ldr		sp,=0x301ec000

	BL InitRORWZI

	LDR R0, =main
	BX	R0

InitRORWZI:

   	STMFD SP!,{R0-R7,LR}

	LDR R1,=0x33000000
	LDR R2,=0x34000000

	MOV R0,#0

labelt2:
	CMP R1,R2
	BGE labelt3
	STR R0,[R1]
	add r1, r1, #4
	B labelt2
labelt3:
	LDMFD SP!,{R0-R7,PC}


Undef_exception_process_asm:
	mov r0, lr
	b Undef_exception_process

.global	exception_vector
exception_vector:
	LDR PC,=reset_exception_process
	LDR PC,=Undef_exception_process_asm
	LDR PC,=SWI_exception_process
	LDR PC,=Pabort_exception_process
	LDR PC,=Dabort_exception_process
	LDR PC,.
	LDR PC,=raw_os_interrupt
	LDR PC,=FIQ_exception_process



